AMD Mobile Serial VID Dual-Phase
Fixed-Frequency Controller
Table 2. Component Suppliers
MANUFACTURER
AVX
BI Technologies
Central Semiconductor
Fairchild Semiconductor
International Rectifier
KEMET
NEC Tokin
Panasonic
WEBSITE
www.avxcorp.com
www.bitechnologies.com
www.centralsemi.com
www.fairchildsemi.com
www.irf.com
www.kemet.com
www.nec-tokin.com
www.panasonic.com
MANUFACTURER
Pulse
Renesas
SANYO
Siliconix (Vishay)
Sumida
Taiyo Yuden
TDK
TOKO
WEBSITE
www.pulseeng.com
www.renesas.com
www.secc.co.jp
www.vishay.com
www.sumida.com
www.t-yuden.com
www.component.tdk.com
www.tokoam.com
Standard Application Circuits
The MAX17009 standard application circuit (Figure 2)
generates two independent 18A outputs for AMD
mobile CPU applications. See Table 1 for component
selections. Table 2 lists the component manufacturers.
Detailed Description
The MAX17009 consists of a dual-fixed-frequency PWM
controller that generates the supply voltage for two inde-
pendent CPU cores. A reference buffer output
(NBV_BUF) sets the regulation voltage for a separate
NB regulator. The CPU cores can be configured as
independent outputs, or as a combined output based
on the GNDS2 pin strap (GNDS2 pulled to 1.5V - 1.8V,
which are the respective voltages for DDR3 and DDR2).
Both SMPS outputs and the NB buffer can be pro-
grammed to any voltage in the VID table (see Table 4)
using the SVI. The CPU is the SVI bus master, while the
MAX17009 is the SVI slave. Voltage transitions are
commanded by the CPU as a single-step command
from one VID code to another. The MAX17009 slews
the SMPS outputs at the slew rate programmed by the
external R TIME resistor. For the NB buffer, the slew rate
is set by the combination of R TIME and the total capaci-
tance on the output of the buffer.
By default, the MAX17009 SMPSs are always in pulse-
skip mode. In separate mode, the PSI_L bit does not
change the mode of operation, but removes the
+12.5mV offset, if enabled by the OPTION pin. In com-
bined mode, the PSI_L bit removes the +12.5mV offset
and switches from 2-phase to 1-phase operation. The
NB_SKP output always follows the state of PSI_L for the
NB regulator.
+5V Bias Supply (V CC , V DD )
The MAX17009 requires an external 5V bias supply in
addition to the battery. Typically, this 5V bias supply is
the notebook’s main 95%-efficient 5V system supply.
Keeping the bias supply external to the IC improves
efficiency and eliminates the cost associated with the
5V linear regulator that would otherwise be needed to
supply the PWM circuit and gate drivers.
The 5V bias supply powers both the PWM controller
and internal gate-drive power, so the maximum current
drawn is:
I BIAS = I CC + f SW Q G = 10mA to 60mA (typ)
where I CC is provided in the Electrical Characteristics
table, and f SW Q G (per phase) is the driver’s supply cur-
rent, as defined in the MOSFET’s data sheet. If the +5V
bias supply is powered up prior to the battery supply,
the enable signal ( SHDN going from low to high) must
be delayed until the battery voltage is present to ensure
startup.
Switching Frequency (OSC)
Connect a resistor (R OSC ) between OSC and GND to
set the switching frequency (per phase):
f SW = 300kHz x 143k Ω / R OSC
A 35.7k Ω to 432k Ω corresponds to switching frequencies
of 1.2MHz to 100kHz, respectively. High-frequency
(1.2MHz) operation optimizes the application for the
smallest component size, trading off efficiency due to
higher switching losses. This may be acceptable in
ultra-portable devices where the load currents are lower
and the controller is powered from a lower voltage sup-
ply. Low-frequency (100kHz) operation offers the best
overall efficiency at the expense of component size and
board space. Minimum on-time (t ON(MIN) ) must also be
taken into consideration. See the Switching frequency
bullet in the SMPS Design Procedure section.
20
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